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Please use this identifier to cite or link to this item: http://hdl.handle.net/123456789/5094

Title: Automatic Test Pattern Generation for Iterative Logic Arrays
Authors: Boateng, K.O.
Keywords: Test pattern generation
Design for testability (DFT)
Issue Date: 2004
Publisher: Journal of Science and Technology
Citation: Journal of Science and Technology, Vol. 24 No. 2, 2004 pp 1-7
Abstract: In this work, measures to evaluate fault-effect propagation of test patterns of a C-test are first formulated. Next, the repetition property of the test patterns is exploited to develop a method for generating C-tests for ILAs under the cell fault model. Based on the results of test generation, the method identifies points of insertion of extra hardware in order to achieve C-testability for the target array. Finally, results obtained by applying the proposed method to generate minimum C-tests for a few well-known arithmetic arrays are shown.
Description: Article published in the Journal of Science and Technology, Vol. 24 No. 2, 2004 pp 1-7
URI: http://hdl.handle.net/123456789/5094
Appears in Collections:Journal of Science and Technology 2000-

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